ISDN S/T HDLC FIFO Controller (HFC-S PCI)
ISDN S/T HDLC FIFO Controller (HFC-S PCI A)


 
 HFC-S PCI / HFC-S PCI A block diagram

HFC-S PCI not recommended for new projects!
Use HFC-S PCI A instead because of its PCI Spec. 2.2 compliance.


 

Functions

The HFC-S PCI / HFC-S PCI A is a HDLC B- and D-channel controller with integrated S/T interface. It can be used for ISDN basic rate lines. All channels (2B+D) are served fully duplex by six deep FIFOs. The HFC-S PCI / HFC-S PCI A has an integrated PCI bus interface. Also implemented is a PCM30 highway interface, which is able to connect to many telecom serial busses. 

Features

  • single chip ISDN-S-controller with B- and D-channel HDLC support
  • independent read and write HDLC-channels for 2 ISDN B-channels and one ISDN D-channel
  • B1- and B2-channel transparent mode independently selectable
  • FIFO-Memory-Window (PC's memory is used for the FIFOs):

  • B-channel: 4x 7.5 KByte, maximum 31 HDLC frames per FIFO 
    D-channel: 2x 512 Byte, maximum 15 HDLC frames per FIFO 
  • 56 KBit/s restricted mode for U.S. ISDN lines selectable by software
  • full I.430 ITU S/T ISDN support in TE and NT mode for 3.3V and 5V power supply
  • B1+B2 HDLC mode
  • PCM30 interface configurable to interface MITEL STTM bus (MVIPTM), Siemens IOM2TM or GCITM for interface to U-chip or external CODECs
  • HFC-S PCI only:

  • integrated PCI Spec. 2.1 bus interface (power management included) for 3.3V and 5V bus signal environment 
  • new HFC-S PCI A only:

  • integrated PCI Spec. 2.2 bus interface (power management included, ACPI ready) for 3.3V and 5V bus signal environment 
  • direct access to PCM30 interface for tone synthetisation
  • 3.3V and 5V supply voltage
  • case QFP 100

Applications

 

Download datasheet for HFC-S PCI A 

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