ISDN U HDLC FIFO Controller (HFC-U)


 
 HFC-U block diagram
 

 

Functions

The HFC-U is a HDLC B- and D-channel controller. It can be used for ISDN basic rate lines. All channels (2B+D) are served fully duplex by six deep FIFOs. Also implemented is a ISA-PC bus interface and a microprocessor interface. 

Features

  • FIFO-Depth:

  • B-channel: 4x 7.5 KByte, maximum 31 HDLC frames per FIFO 
    D-channel: 2x 512 Byte, maximum 15 HDLC frames per FIFO 
  • independent read/write HDLC-channels for two ISDN B-channels and one ISDN D-channel
  • 56 KBit/s restricted mode for U.S. ISDN lines selectable by software
  • full I.430 ITU S/T ISDN support in TE and NT mode
  • PCM30 interface configurable to interface MITEL STTM bus (MVIPTM), Siemens IOM2TM or GCITM for interface to U-chip
  • direct 8 bit ISA-PC bus interface with buffers for ISA data bus; one of 6 interrupt channels selectable by software
  • microprocessor interface compatible to Motorola bus and Siemens/Intel bus
  • only 2 I/O addresses used on PC ISA bus; I/O addresses programmable (no memory mapping, no DMA)
  • CMOS technology 3V-5V, case QFP 100
 

Download datasheet for HFC-U 

More ISDN chips 

 
 
NewsISDN ChipsDatasheetsDistributorsDriver SoftwareSample Applications 
  Homepage E-Mail

Copyright © 1997 Cologne Chip Designs