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<td BACKGROUND="bar-middle.jpg" HEIGHT=60><FONT FACE="Arial,Helvetica"><FONT SIZE="+1"><FONT COLOR="#FFFFFF">HFC-U</FONT></FONT></FONT></TD>
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<H3>
The HFC-U is not recommended for new projects. The <A HREF="frame-hfc-spl.htm" TARGET="_top">HFC-S+</A> or
<A HREF="frame-hfc-sp.htm" TARGET="_top">HFC-SP</A> should be used instead!</H3>
<BR>
<P>
<H3>
Functions</H3>
The HFC-U is a HDLC B- and D-channel controller. It can be used for ISDN
basic rate lines. All channels (2B+D) are served fully duplex by six deep
FIFOs. Also implemented is a ISA-PC bus interface and a microprocessor
interface.
<BR><BR>
<BR>
<H3>
Block Diagram</H3>
<IMG SRC="hfc-u.gif" ALT="HFC-U Block Diagram" HEIGHT=356 WIDTH=650>
<BR>
<BR>
<BR>
<H3>
Features</H3>
<UL TYPE=SQUARE>
<LI>
FIFO-Depth:</LI>
<BR>B-channel: 4x 7.5 KByte, maximum 31 HDLC frames per FIFO
<BR>D-channel: 2x 512 Byte, maximum 15 HDLC frames per FIFO <BR><BR>
<LI>
independent read/write HDLC-channels for two ISDN B-channels and one ISDN
D-channel</LI><BR><BR>
<LI>
56 KBit/s restricted mode for U.S. ISDN lines selectable by software</LI><BR><BR>
<LI>
full I.430 ITU S/T ISDN support in TE and NT mode</LI><BR><BR>
<LI>
PCM30 interface configurable to interface MITEL ST<SUP>TM</SUP> bus (MVIP<SUP>TM</SUP>),
Siemens IOM2<SUP>TM</SUP> or GCI<SUP>TM</SUP> for interface to U-chip</LI><BR><BR>
<LI>
direct 8 bit ISA-PC bus interface with buffers for ISA data bus; one of
6 interrupt channels selectable by software</LI><BR><BR>
<LI>
microprocessor interface compatible to Motorola bus and Siemens/Intel bus</LI><BR><BR>
<LI>
only 2 I/O addresses used on PC ISA bus; I/O addresses programmable (no
memory mapping, no DMA)</LI><BR><BR>
<LI>
CMOS technology 3V-5V, case QFP 100</LI><BR><BR>
</UL>
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<H3>
Datasheet</H3>
<A HREF="main-datasheets.htm#hfc-u">Get Datasheet</A>
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