Cologne Chip

HFC-E1

Functions

The HFC-E1 is a HDLC B- and D-channel controller with integrated E1 (S2M) interface. It can be used for ISDN primary rate lines. All channels are served fully duplex by deep FIFOs. Also implemented is a PCM128/PCM64/PCM30 highway interface (which is able to connect to many telecom serial busses) and an universal external bus interface.

Block Diagram

Features

single chip ISDN-E1-controller with B- and D-channel HDLC support

integrated E1 (S2M) interface

full I.431 ITU compliant E1 (S2M) ISDN support in LT and NT mode

32 independent read and write HDLC-channels
for e.g. 30 ISDN B-channels, 1 ISDN D-channel and 1 timeslot on the PCM interface

B-channel transparent mode independently selectable

up to 64 FIFOs; FIFO-size configurable

each FIFO can be assigned to an arbitrary channel of the E1 (S2M) or PCM interface

max. 31 HDLC frames (with 128k or 512k external RAM) or 15 HDLC frames (with 32k built-in RAM) per FIFO

1 - 8 Bit processing for subchannels selectable

B-channels for higher data rate combinable

PCM128 / PCM64 / PCM30 interface configurable to interface MITEL ST^TM bus (MVIP^TM) or Siemens IOM2^TM and Motorola GCI^TM (bearer slots supported only) for inter-chip connection (e.g. external CODECs)