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 Functions
The HFC-E1 is a HDLC B- and D-channel controller with integrated E1 (S2M) interface.
It can be used for ISDN primary rate lines.
All channels are served fully duplex by deep FIFOs.
Also implemented is a PCM128/PCM64/PCM30 highway interface (which is able to connect to many telecom serial busses)
and an universal external bus interface.
Block Diagram
Features
- single chip ISDN-E1-controller with B- and D-channel HDLC support
- integrated E1 (S2M) interface
- full I.431 ITU compliant E1 (S2M) ISDN support in LT and NT mode
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32 independent read and write HDLC-channels
for e.g. 30 ISDN B-channels, 1 ISDN D-channel and 1 timeslot on the PCM interface
- B-channel transparent mode independently selectable
- up to 64 FIFOs; FIFO-size configurable
- each FIFO can be assigned to an arbitrary channel of the E1 (S2M) or PCM interface
- max. 31 HDLC frames (with 128k or 512k external RAM) or 15 HDLC frames (with 32k built-in RAM) per FIFO
- 1 - 8 Bit processing for subchannels selectable
- B-channels for higher data rate combinable
- PCM128 / PCM64 / PCM30 interface configurable to interface MITEL STTM bus (MVIPTM) or Siemens IOM2TM and Motorola GCITM (bearer slots supported only) for inter-chip connection (e.g. external CODECs)
- H.100 data rate support
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universal external bus interfacce configurable into PCI bus, ISA-PnP, PCMCIA or microprocessor interface as well as SPI (serial processor interface)
- multiparty audio conferences switchable
- DTMF detection on all B-channels
- timer with interrupt capability
- CMOS technology 3.3V (5V tolerant inputs)
- LQFP 208 package, RoHS compliant
Applications
- ISDN PRI terminal adapters
- ISDN PABX for PRI
- ISDN LAN routers for PRI
- ISDN least cost routers for PRI
- ISDN test equipment for PRI
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Evaluation Board
Contact us for an evaluation board of HFC-E1.
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Datasheet
Get Datasheet
Copyright © 2007 Cologne Chip
The ISDN Chip Company!
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Last Modified: 23/05/2007
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