HFC-S mini  


The HFC-S mini is not recommended for new projects.
Please use XHFC-1SU instead.

 

Functions

The HFC-S mini is a single-chip ISDN S/T HDLC basic rate controller for embedded applications.
The S/T interface, HDLC-controllers, FIFOs and a microprocessor interface are integrated in the HFC-S mini.
A PCM128 / PCM64 / PCM30 interface is also implemented which is able to connect to many telecom serial busses. CODECs are usually connected to this interface. All ISDN channels (2B+1D) and the PCM interface are served fully duplex by the 8 integrated FIFOs.

 

Block Diagram

HFC-S mini Block Diagram

 

Features

  • single chip ISDN-S/T-controller with B- and D-channel HDLC support
  • integrated S/T interface
  • full I.430 ITU S/T ISDN support in TE and NT mode for 3.3V and 5V supply power
  • independent read and write HDLC-channels for two ISDN B-channels, one ISDN D-channel and one PCM timeslot (or E-channel)
  • B1- and B2-channel transparent mode independently selectable
  • integrated FIFOs for B1, B2, D and PCM (or E)
  • FIFO size: 128 bytes per channel and direction; up to 7 HDLC frames per FIFO
  • 56 KBit/s restricted mode for U.S. ISDN lines selectable by software
  • PCM128 / PCM64 / PCM30 interface configurable to interface MITEL STTM bus (MVIPTM), Siemens IOM2TM or GCITM for interface to U-chip or external CODECs
  • H.100 data rate supported
  • integrated microprocessor interface compatible to Motorola bus and Siemens/Intel bus
  • timer with interrupt capability
  • CMOS technology, 3V - 5V
  • case PQFP 48, RoHS compliant

 

Applications

 

 

Linux Driver

Generic Linux drivers for HFC-S mini are available upon request.

 

 

Evaluation board of HFC-S mini   

Evaluation Kit

Contact us for an evaluation kit for HFC-S mini.

 

Datasheet

Get Datasheet

 

 

Copyright © 2007 Cologne Chip
The ISDN Chip Company!
Last Modified: 22/05/2007