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The HFC-S mini is not recommended for new projects.
Please use XHFC-1SU instead.
Functions
The HFC-S mini is a single-chip ISDN S/T HDLC basic rate controller for embedded applications.
The S/T interface, HDLC-controllers, FIFOs and a microprocessor interface are integrated
in the HFC-S mini.
A PCM128 / PCM64 / PCM30 interface is also implemented which is able to connect to many telecom serial busses. CODECs
are usually connected to this interface. All ISDN channels (2B+1D) and the PCM
interface are served fully duplex by the 8 integrated FIFOs.
Block Diagram
Features
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single chip ISDN-S/T-controller with B- and D-channel HDLC support
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integrated S/T interface
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full I.430 ITU S/T ISDN support in TE and NT mode for 3.3V and 5V supply power
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independent read and write HDLC-channels for two ISDN B-channels, one
ISDN D-channel and one PCM timeslot (or E-channel)
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B1- and B2-channel transparent mode independently selectable
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integrated FIFOs for B1, B2, D and PCM (or E)
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FIFO size: 128 bytes per channel and direction; up to 7 HDLC frames per FIFO
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56 KBit/s restricted mode for U.S. ISDN lines selectable by software
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PCM128 / PCM64 / PCM30 interface configurable to interface MITEL STTM bus (MVIPTM),
Siemens IOM2TM or GCITM for interface to U-chip or
external CODECs
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H.100 data rate supported
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integrated microprocessor interface compatible to Motorola bus and Siemens/Intel bus
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timer with interrupt capability
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CMOS technology, 3V - 5V
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case PQFP 48, RoHS compliant
Applications
Linux Driver
Generic Linux drivers for HFC-S mini are available upon request.
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Evaluation Kit
Contact us for an evaluation kit for HFC-S mini.
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Datasheet
Get Datasheet
Copyright © 2007 Cologne
Chip The ISDN Chip Company! |
Last Modified: 22/05/2007 |
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